<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
<html xmlns="http://www.w3.org/1999/xhtml">
<head>
<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
<meta http-equiv="X-UA-Compatible" content="IE=9"/>
<meta name="generator" content="Doxygen 1.8.5"/>
<title>dppsu: xdppsu.c File Reference</title>
<link href="tabs.css" rel="stylesheet" type="text/css"/>
<script type="text/javascript" src="jquery.js"></script>
<script type="text/javascript" src="dynsections.js"></script>
<link href="navtree.css" rel="stylesheet" type="text/css"/>
<script type="text/javascript" src="resize.js"></script>
<script type="text/javascript" src="navtree.js"></script>
<script type="text/javascript">
  $(document).ready(initResizable);
  $(window).load(resizeHeight);
</script>
<link href="doxygen.css" rel="stylesheet" type="text/css" />
<link href="HTML_custom.css" rel="stylesheet" type="text/css"/>
</head>
<body>
<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
<div id="titlearea">
<table cellspacing="0" cellpadding="0">
 <tbody>
 <tr style="height: 56px;">
  <td id="projectlogo"><img alt="Logo" src="xlogo_bg.png"/></td>
  <td style="padding-left: 0.5em;">
   <div id="projectname">dppsu
   </div>
   <div id="projectbrief">Vitis Drivers API Documentation</div>
  </td>
 </tr>
 </tbody>
</table>
</div>
<!-- end header part -->
<!-- Generated by Doxygen 1.8.5 -->
  <div id="navrow1" class="tabs">
    <ul class="tablist">
      <li><a href="index.html"><span>Overview</span></a></li>
      <li><a href="annotated.html"><span>Data&#160;Structures</span></a></li>
      <li><a href="globals.html"><span>APIs</span></a></li>
      <li><a href="files.html"><span>File&#160;List</span></a></li>
    </ul>
  </div>
</div><!-- top -->
<div id="side-nav" class="ui-resizable side-nav-resizable">
  <div id="nav-tree">
    <div id="nav-tree-contents">
      <div id="nav-sync" class="sync"></div>
    </div>
  </div>
  <div id="splitbar" style="-moz-user-select:none;" 
       class="ui-resizable-handle">
  </div>
</div>
<script type="text/javascript">
$(document).ready(function(){initNavTree('xdppsu_8c.html','');});
</script>
<div id="doc-content">
<div class="header">
  <div class="summary">
<a href="#enum-members">Enumerations</a> &#124;
<a href="#func-members">Functions</a>  </div>
  <div class="headertitle">
<div class="title">xdppsu.c File Reference</div>  </div>
</div><!--header-->
<div class="contents">
<a name="details" id="details"></a><h2 class="groupheader">Overview</h2>
<div class="textblock"><p>Contains a minimal set of functions for the <a class="el" href="struct_x_dp_psu.html" title="The XDpPsu driver instance data. ">XDpPsu</a> driver that allow access to all of the DisplayPort TX core's functionality. </p>
<p>See <a class="el" href="xdppsu_8h.html" title="The Xilinx DisplayPort transmitter (DPTX_PS) driver. ">xdppsu.h</a> for a detailed description of the driver.</p>
<dl class="section note"><dt>Note</dt><dd>None.</dd></dl>
<pre>
MODIFICATION HISTORY:</pre><pre>Ver   Who  Date     Changes
</p>
<hr/>
<p>
1.0   aad  01/27/17 Initial release.
</pre> </div><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="enum-members"></a>
Enumerations</h2></td></tr>
<tr class="memitem:aa3659e6349a3fc69433bf9b12673bdff"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xdppsu_8c.html#aa3659e6349a3fc69433bf9b12673bdff">XDpPsu_TrainingState</a> </td></tr>
<tr class="memdesc:aa3659e6349a3fc69433bf9b12673bdff"><td class="mdescLeft">&#160;</td><td class="mdescRight">This typedef enumerates the list of training states used in the state machine during the link training process.  <a href="xdppsu_8c.html#aa3659e6349a3fc69433bf9b12673bdff">More...</a><br/></td></tr>
<tr class="separator:aa3659e6349a3fc69433bf9b12673bdff"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
Functions</h2></td></tr>
<tr class="memitem:a2602de9c767cd981896326433a3c2570"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xdppsu_8c.html#a2602de9c767cd981896326433a3c2570">XDpPsu_InitializeTx</a> (<a class="el" href="struct_x_dp_psu.html">XDpPsu</a> *InstancePtr)</td></tr>
<tr class="memdesc:a2602de9c767cd981896326433a3c2570"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function prepares the DisplayPort TX core for use.  <a href="#a2602de9c767cd981896326433a3c2570">More...</a><br/></td></tr>
<tr class="separator:a2602de9c767cd981896326433a3c2570"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a619d7de707e733f244b8eeaf8dbc8377"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xdppsu_8c.html#a619d7de707e733f244b8eeaf8dbc8377">XDpPsu_CfgInitialize</a> (<a class="el" href="struct_x_dp_psu.html">XDpPsu</a> *InstancePtr, <a class="el" href="struct_x_dp_psu___config.html">XDpPsu_Config</a> *ConfigPtr, u32 EffectiveAddr)</td></tr>
<tr class="memdesc:a619d7de707e733f244b8eeaf8dbc8377"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function retrieves the configuration for this DisplayPort TX instance and fills in the InstancePtr-&gt;Config structure.  <a href="#a619d7de707e733f244b8eeaf8dbc8377">More...</a><br/></td></tr>
<tr class="separator:a619d7de707e733f244b8eeaf8dbc8377"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a0a935cce246619f8f43ea0794ed9fa8e"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xdppsu_8c.html#a0a935cce246619f8f43ea0794ed9fa8e">XDpPsu_GetRxCapabilities</a> (<a class="el" href="struct_x_dp_psu.html">XDpPsu</a> *InstancePtr)</td></tr>
<tr class="memdesc:a0a935cce246619f8f43ea0794ed9fa8e"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function retrieves the RX device's capabilities from the RX device's DisplayPort Configuration Data (DPCD).  <a href="#a0a935cce246619f8f43ea0794ed9fa8e">More...</a><br/></td></tr>
<tr class="separator:a0a935cce246619f8f43ea0794ed9fa8e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a3d4cefedd9d272f58c7927b72add609d"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xdppsu_8c.html#a3d4cefedd9d272f58c7927b72add609d">XDpPsu_CfgMainLinkMax</a> (<a class="el" href="struct_x_dp_psu.html">XDpPsu</a> *InstancePtr)</td></tr>
<tr class="memdesc:a3d4cefedd9d272f58c7927b72add609d"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function determines the common capabilities between the DisplayPort TX core and the RX device.  <a href="#a3d4cefedd9d272f58c7927b72add609d">More...</a><br/></td></tr>
<tr class="separator:a3d4cefedd9d272f58c7927b72add609d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:abe31bd9b101b094a40eff13ef032ea44"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xdppsu_8c.html#abe31bd9b101b094a40eff13ef032ea44">XDpPsu_EstablishLink</a> (<a class="el" href="struct_x_dp_psu.html">XDpPsu</a> *InstancePtr)</td></tr>
<tr class="memdesc:abe31bd9b101b094a40eff13ef032ea44"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function checks if the link needs training and runs the training sequence if training is required.  <a href="#abe31bd9b101b094a40eff13ef032ea44">More...</a><br/></td></tr>
<tr class="separator:abe31bd9b101b094a40eff13ef032ea44"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae723bbc24a4dbce124cdd92979af27af"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xdppsu_8c.html#ae723bbc24a4dbce124cdd92979af27af">XDpPsu_CheckLinkStatus</a> (<a class="el" href="struct_x_dp_psu.html">XDpPsu</a> *InstancePtr, u8 LaneCount)</td></tr>
<tr class="memdesc:ae723bbc24a4dbce124cdd92979af27af"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function checks if the reciever's DisplayPort Configuration Data (DPCD) indicates the reciever has achieved and maintained clock recovery, channel equalization, symbol lock, and interlane alignment for all lanes currently in use.  <a href="#ae723bbc24a4dbce124cdd92979af27af">More...</a><br/></td></tr>
<tr class="separator:ae723bbc24a4dbce124cdd92979af27af"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aee45a79c993e3bcad636dddf3121aeab"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xdppsu_8c.html#aee45a79c993e3bcad636dddf3121aeab">XDpPsu_IsConnected</a> (<a class="el" href="struct_x_dp_psu.html">XDpPsu</a> *InstancePtr)</td></tr>
<tr class="memdesc:aee45a79c993e3bcad636dddf3121aeab"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function checks if there is a connected RX device.  <a href="#aee45a79c993e3bcad636dddf3121aeab">More...</a><br/></td></tr>
<tr class="separator:aee45a79c993e3bcad636dddf3121aeab"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab9d129accbf09c6474ba5e1fac854983"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xdppsu_8c.html#ab9d129accbf09c6474ba5e1fac854983">XDpPsu_AuxRead</a> (<a class="el" href="struct_x_dp_psu.html">XDpPsu</a> *InstancePtr, u32 DpcdAddress, u32 BytesToRead, void *ReadData)</td></tr>
<tr class="memdesc:ab9d129accbf09c6474ba5e1fac854983"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function issues a read request over the AUX channel that will read from the RX device's DisplayPort Configuration Data (DPCD) address space.  <a href="#ab9d129accbf09c6474ba5e1fac854983">More...</a><br/></td></tr>
<tr class="separator:ab9d129accbf09c6474ba5e1fac854983"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a619df5cbd94b7f0459e62b55a34e5df5"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xdppsu_8c.html#a619df5cbd94b7f0459e62b55a34e5df5">XDpPsu_AuxWrite</a> (<a class="el" href="struct_x_dp_psu.html">XDpPsu</a> *InstancePtr, u32 DpcdAddress, u32 BytesToWrite, void *WriteData)</td></tr>
<tr class="memdesc:a619df5cbd94b7f0459e62b55a34e5df5"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function issues a write request over the AUX channel that will write to the RX device's DisplayPort Configuration Data (DPCD) address space.  <a href="#a619df5cbd94b7f0459e62b55a34e5df5">More...</a><br/></td></tr>
<tr class="separator:a619df5cbd94b7f0459e62b55a34e5df5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a17608072027dcae9a885b07ad2c25690"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xdppsu_8c.html#a17608072027dcae9a885b07ad2c25690">XDpPsu_IicRead</a> (<a class="el" href="struct_x_dp_psu.html">XDpPsu</a> *InstancePtr, u8 IicAddress, u16 Offset, u16 BytesToRead, void *ReadData)</td></tr>
<tr class="memdesc:a17608072027dcae9a885b07ad2c25690"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function performs an I2C read over the AUX channel.  <a href="#a17608072027dcae9a885b07ad2c25690">More...</a><br/></td></tr>
<tr class="separator:a17608072027dcae9a885b07ad2c25690"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a22050229650e6ee5ac11242e5387e8e4"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xdppsu_8c.html#a22050229650e6ee5ac11242e5387e8e4">XDpPsu_IicWrite</a> (<a class="el" href="struct_x_dp_psu.html">XDpPsu</a> *InstancePtr, u8 IicAddress, u8 BytesToWrite, void *WriteData)</td></tr>
<tr class="memdesc:a22050229650e6ee5ac11242e5387e8e4"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function performs an I2C write over the AUX channel.  <a href="#a22050229650e6ee5ac11242e5387e8e4">More...</a><br/></td></tr>
<tr class="separator:a22050229650e6ee5ac11242e5387e8e4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a7836168f290562156a24fb51762acde4"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xdppsu_8c.html#a7836168f290562156a24fb51762acde4">XDpPsu_SetDownspread</a> (<a class="el" href="struct_x_dp_psu.html">XDpPsu</a> *InstancePtr, u8 Enable)</td></tr>
<tr class="memdesc:a7836168f290562156a24fb51762acde4"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function enables or disables 0.5% spreading of the clock for both the DisplayPort and the RX device.  <a href="#a7836168f290562156a24fb51762acde4">More...</a><br/></td></tr>
<tr class="separator:a7836168f290562156a24fb51762acde4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a2ec5ae4af1f5232fc86116d457045997"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xdppsu_8c.html#a2ec5ae4af1f5232fc86116d457045997">XDpPsu_SetEnhancedFrameMode</a> (<a class="el" href="struct_x_dp_psu.html">XDpPsu</a> *InstancePtr, u8 Enable)</td></tr>
<tr class="memdesc:a2ec5ae4af1f5232fc86116d457045997"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function enables or disables the enhanced framing symbol sequence for both the DisplayPort TX core and the RX device.  <a href="#a2ec5ae4af1f5232fc86116d457045997">More...</a><br/></td></tr>
<tr class="separator:a2ec5ae4af1f5232fc86116d457045997"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a868ca9bd2184707f3929e6f7e695cc93"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xdppsu_8c.html#a868ca9bd2184707f3929e6f7e695cc93">XDpPsu_SetLaneCount</a> (<a class="el" href="struct_x_dp_psu.html">XDpPsu</a> *InstancePtr, u8 LaneCount)</td></tr>
<tr class="memdesc:a868ca9bd2184707f3929e6f7e695cc93"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the number of lanes to be used by the main link for both the DisplayPort TX core and the RX device.  <a href="#a868ca9bd2184707f3929e6f7e695cc93">More...</a><br/></td></tr>
<tr class="separator:a868ca9bd2184707f3929e6f7e695cc93"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a68384c6a808dff1f2e68e7611057a548"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xdppsu_8c.html#a68384c6a808dff1f2e68e7611057a548">XDpPsu_SetLinkRate</a> (<a class="el" href="struct_x_dp_psu.html">XDpPsu</a> *InstancePtr, u8 LinkRate)</td></tr>
<tr class="memdesc:a68384c6a808dff1f2e68e7611057a548"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the data rate to be used by the main link for both the DisplayPort TX core and the RX device.  <a href="#a68384c6a808dff1f2e68e7611057a548">More...</a><br/></td></tr>
<tr class="separator:a68384c6a808dff1f2e68e7611057a548"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a690be0eee00d0c06370f88fdfbfdfb75"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xdppsu_8c.html#a690be0eee00d0c06370f88fdfbfdfb75">XDpPsu_SetScrambler</a> (<a class="el" href="struct_x_dp_psu.html">XDpPsu</a> *InstancePtr, u8 Enable)</td></tr>
<tr class="memdesc:a690be0eee00d0c06370f88fdfbfdfb75"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function enables or disables scrambling of symbols for both the DisplayPort and the RX device.  <a href="#a690be0eee00d0c06370f88fdfbfdfb75">More...</a><br/></td></tr>
<tr class="separator:a690be0eee00d0c06370f88fdfbfdfb75"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad113ed848850849d07fae7ce163a8a62"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xdppsu_8c.html#ad113ed848850849d07fae7ce163a8a62">XDpPsu_EnableMainLink</a> (<a class="el" href="struct_x_dp_psu.html">XDpPsu</a> *InstancePtr, u8 Enable)</td></tr>
<tr class="memdesc:ad113ed848850849d07fae7ce163a8a62"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function enables the main link.  <a href="#ad113ed848850849d07fae7ce163a8a62">More...</a><br/></td></tr>
<tr class="separator:ad113ed848850849d07fae7ce163a8a62"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a6eec1f08aa677fac3467a9d34b54589c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xdppsu_8c.html#a6eec1f08aa677fac3467a9d34b54589c">XDpPsu_ResetPhy</a> (<a class="el" href="struct_x_dp_psu.html">XDpPsu</a> *InstancePtr, u32 Reset)</td></tr>
<tr class="memdesc:a6eec1f08aa677fac3467a9d34b54589c"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function does a PHY reset.  <a href="#a6eec1f08aa677fac3467a9d34b54589c">More...</a><br/></td></tr>
<tr class="separator:a6eec1f08aa677fac3467a9d34b54589c"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table>
<h2 class="groupheader">Enumeration Type Documentation</h2>
<a class="anchor" id="aa3659e6349a3fc69433bf9b12673bdff"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">enum <a class="el" href="xdppsu_8c.html#aa3659e6349a3fc69433bf9b12673bdff">XDpPsu_TrainingState</a></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This typedef enumerates the list of training states used in the state machine during the link training process. </p>

</div>
</div>
<h2 class="groupheader">Function Documentation</h2>
<a class="anchor" id="ab9d129accbf09c6474ba5e1fac854983"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XDpPsu_AuxRead </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dp_psu.html">XDpPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>DpcdAddress</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>BytesToRead</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">void *&#160;</td>
          <td class="paramname"><em>ReadData</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function issues a read request over the AUX channel that will read from the RX device's DisplayPort Configuration Data (DPCD) address space. </p>
<p>The read message will be divided into multiple transactions which read a maximum of 16 bytes each.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dp_psu.html" title="The XDpPsu driver instance data. ">XDpPsu</a> instance. </td></tr>
    <tr><td class="paramname">DpcdAddress</td><td>is the starting address to read from the RX device. </td></tr>
    <tr><td class="paramname">BytesToRead</td><td>is the number of bytes to read from the RX device. </td></tr>
    <tr><td class="paramname">ReadData</td><td>is a pointer to the data buffer that will be filled with read data.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if the AUX read request was successfully acknowledged.</li>
<li>XST_DEVICE_NOT_FOUND if no RX device is connected.</li>
<li>XST_ERROR_COUNT_MAX if the AUX request timed out.</li>
<li>XST_FAILURE otherwise.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_dp_psu.html#a1a3729a9b372f0371dea0a523cdf639d">XDpPsu::IsReady</a>, and <a class="el" href="xdppsu__hw_8h.html#ad51f02c0576e8074f3c00e4182ecaab9">XDPPSU_AUX_CMD_READ</a>.</p>

<p>Referenced by <a class="el" href="xdppsu_8h.html#a0a935cce246619f8f43ea0794ed9fa8e">XDpPsu_GetRxCapabilities()</a>, <a class="el" href="xdppsu_8h.html#a7836168f290562156a24fb51762acde4">XDpPsu_SetDownspread()</a>, <a class="el" href="xdppsu_8h.html#a2ec5ae4af1f5232fc86116d457045997">XDpPsu_SetEnhancedFrameMode()</a>, <a class="el" href="xdppsu_8h.html#a868ca9bd2184707f3929e6f7e695cc93">XDpPsu_SetLaneCount()</a>, and <a class="el" href="xdppsu_8h.html#a690be0eee00d0c06370f88fdfbfdfb75">XDpPsu_SetScrambler()</a>.</p>

</div>
</div>
<a class="anchor" id="a619df5cbd94b7f0459e62b55a34e5df5"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XDpPsu_AuxWrite </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dp_psu.html">XDpPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>DpcdAddress</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>BytesToWrite</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">void *&#160;</td>
          <td class="paramname"><em>WriteData</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function issues a write request over the AUX channel that will write to the RX device's DisplayPort Configuration Data (DPCD) address space. </p>
<p>The write message will be divided into multiple transactions which write a maximum of 16 bytes each.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dp_psu.html" title="The XDpPsu driver instance data. ">XDpPsu</a> instance. </td></tr>
    <tr><td class="paramname">DpcdAddress</td><td>is the starting address to write to the RX device. </td></tr>
    <tr><td class="paramname">BytesToWrite</td><td>is the number of bytes to write to the RX device. </td></tr>
    <tr><td class="paramname">WriteData</td><td>is a pointer to the data buffer that contains the data to be written to the RX device.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if the AUX write request was successfully acknowledged.</li>
<li>XST_DEVICE_NOT_FOUND if no RX device is connected.</li>
<li>XST_ERROR_COUNT_MAX if the AUX request timed out.</li>
<li>XST_FAILURE otherwise.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_dp_psu.html#a1a3729a9b372f0371dea0a523cdf639d">XDpPsu::IsReady</a>, and <a class="el" href="xdppsu__hw_8h.html#aa00034da8faac0abfb2c515aab654963">XDPPSU_AUX_CMD_WRITE</a>.</p>

<p>Referenced by <a class="el" href="xdppsu_8h.html#a7836168f290562156a24fb51762acde4">XDpPsu_SetDownspread()</a>, <a class="el" href="xdppsu_8h.html#a2ec5ae4af1f5232fc86116d457045997">XDpPsu_SetEnhancedFrameMode()</a>, <a class="el" href="xdppsu_8h.html#a868ca9bd2184707f3929e6f7e695cc93">XDpPsu_SetLaneCount()</a>, <a class="el" href="xdppsu_8h.html#a68384c6a808dff1f2e68e7611057a548">XDpPsu_SetLinkRate()</a>, and <a class="el" href="xdppsu_8h.html#a690be0eee00d0c06370f88fdfbfdfb75">XDpPsu_SetScrambler()</a>.</p>

</div>
</div>
<a class="anchor" id="a619d7de707e733f244b8eeaf8dbc8377"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XDpPsu_CfgInitialize </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dp_psu.html">XDpPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_dp_psu___config.html">XDpPsu_Config</a> *&#160;</td>
          <td class="paramname"><em>ConfigPtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>EffectiveAddr</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function retrieves the configuration for this DisplayPort TX instance and fills in the InstancePtr-&gt;Config structure. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dp_psu.html" title="The XDpPsu driver instance data. ">XDpPsu</a> instance. </td></tr>
    <tr><td class="paramname">ConfigPtr</td><td>is a pointer to the configuration structure that will be used to copy the settings from. </td></tr>
    <tr><td class="paramname">EffectiveAddr</td><td>is the device base address in the virtual memory space. If the address translation is not used, then the physical address is passed.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>Unexpected errors may occur if the address mapping is changed after this function is invoked. </dd></dl>

<p>References <a class="el" href="struct_x_dp_psu___config.html#a59991a74d33038e382665a3460a669ee">XDpPsu_Config::BaseAddr</a>, <a class="el" href="struct_x_dp_psu.html#a95a9619caa3d18b50a4562de54d57704">XDpPsu::Config</a>, <a class="el" href="struct_x_dp_psu___config.html#a617652abd46febf4474c8bdf4f10e1b9">XDpPsu_Config::DeviceId</a>, <a class="el" href="struct_x_dp_psu.html#a1a3729a9b372f0371dea0a523cdf639d">XDpPsu::IsReady</a>, and <a class="el" href="struct_x_dp_psu.html#ad115a6324d57fadb9fdf33a5d1bb3133">XDpPsu::SAxiClkHz</a>.</p>

<p>Referenced by <a class="el" href="xdppsu__selftest__example_8c.html#a10828d1ee5d6d1839041dd4cf6ff36d3">DpPsu_SelfTestExample()</a>, and <a class="el" href="xdppsu__common__example_8h.html#ab974530daf60911aba3ef16148bd85ad">DpPsu_SetupExample()</a>.</p>

</div>
</div>
<a class="anchor" id="a3d4cefedd9d272f58c7927b72add609d"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XDpPsu_CfgMainLinkMax </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dp_psu.html">XDpPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function determines the common capabilities between the DisplayPort TX core and the RX device. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dp_psu.html" title="The XDpPsu driver instance data. ">XDpPsu</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if main link settings were successfully set.</li>
<li>XST_DEVICE_NOT_FOUND if no RX device is connected.</li>
<li>XST_FAILURE otherwise.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_dp_psu.html#a1a3729a9b372f0371dea0a523cdf639d">XDpPsu::IsReady</a>, <a class="el" href="struct_x_dp_psu.html#a37e28c28f46f7e08ce4738a9232a0678">XDpPsu::LinkConfig</a>, <a class="el" href="struct_x_dp_psu___link_config.html#a0953d4a5c490da688eb7d4636f918712">XDpPsu_LinkConfig::MaxLaneCount</a>, <a class="el" href="struct_x_dp_psu___link_config.html#a7add556a95dbf238f21ae156bfd284f3">XDpPsu_LinkConfig::MaxLinkRate</a>, <a class="el" href="xdppsu_8c.html#a868ca9bd2184707f3929e6f7e695cc93">XDpPsu_SetLaneCount()</a>, and <a class="el" href="xdppsu_8c.html#a68384c6a808dff1f2e68e7611057a548">XDpPsu_SetLinkRate()</a>.</p>

<p>Referenced by <a class="el" href="xdppsu__common__example_8h.html#a64d2267afa217a44aa3bf09bcd51e409">DpPsu_StartLink()</a>.</p>

</div>
</div>
<a class="anchor" id="ae723bbc24a4dbce124cdd92979af27af"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XDpPsu_CheckLinkStatus </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dp_psu.html">XDpPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>LaneCount</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function checks if the reciever's DisplayPort Configuration Data (DPCD) indicates the reciever has achieved and maintained clock recovery, channel equalization, symbol lock, and interlane alignment for all lanes currently in use. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dp_psu.html" title="The XDpPsu driver instance data. ">XDpPsu</a> instance. </td></tr>
    <tr><td class="paramname">LaneCount</td><td>is the number of lanes to check.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if the RX device has maintained clock recovery, channel equalization, symbol lock, and interlane alignment.</li>
<li>XST_DEVICE_NOT_FOUND if no RX device is connected.</li>
<li>XST_FAILURE otherwise.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_dp_psu.html#a1a3729a9b372f0371dea0a523cdf639d">XDpPsu::IsReady</a>, <a class="el" href="xdppsu__hw_8h.html#ab2400bfc1fa2146da8072bbd146f4389">XDPPSU_LANE_COUNT_SET_1</a>, and <a class="el" href="xdppsu__hw_8h.html#a07e8772a5d5bc27127f948b47122cec4">XDPPSU_LANE_COUNT_SET_2</a>.</p>

<p>Referenced by <a class="el" href="xdppsu__common__example_8h.html#a64d2267afa217a44aa3bf09bcd51e409">DpPsu_StartLink()</a>, and <a class="el" href="xdppsu_8h.html#abe31bd9b101b094a40eff13ef032ea44">XDpPsu_EstablishLink()</a>.</p>

</div>
</div>
<a class="anchor" id="ad113ed848850849d07fae7ce163a8a62"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XDpPsu_EnableMainLink </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dp_psu.html">XDpPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Enable</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function enables the main link. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dp_psu.html" title="The XDpPsu driver instance data. ">XDpPsu</a> instance. </td></tr>
    <tr><td class="paramname">Enable</td><td>is a control flag to enable or disable main link</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>Enable = 1, Enable main link Enable =0, Disable main link. </dd></dl>

<p>References <a class="el" href="struct_x_dp_psu___config.html#a59991a74d33038e382665a3460a669ee">XDpPsu_Config::BaseAddr</a>, <a class="el" href="struct_x_dp_psu.html#a95a9619caa3d18b50a4562de54d57704">XDpPsu::Config</a>, <a class="el" href="struct_x_dp_psu.html#a1a3729a9b372f0371dea0a523cdf639d">XDpPsu::IsReady</a>, <a class="el" href="xdppsu__hw_8h.html#a13298309408d465cf884b2b5eb78009b">XDPPSU_ENABLE_MAIN_STREAM</a>, <a class="el" href="xdppsu__hw_8h.html#aa04733c4a40ad233e107c38c163a3423">XDPPSU_FORCE_SCRAMBLER_RESET</a>, and <a class="el" href="xdppsu__hw_8h.html#a823328e4a95aa3ba27553603940a7ba8">XDpPsu_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="xdppsu_8h.html#abe31bd9b101b094a40eff13ef032ea44">XDpPsu_EstablishLink()</a>.</p>

</div>
</div>
<a class="anchor" id="abe31bd9b101b094a40eff13ef032ea44"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XDpPsu_EstablishLink </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dp_psu.html">XDpPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function checks if the link needs training and runs the training sequence if training is required. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dp_psu.html" title="The XDpPsu driver instance data. ">XDpPsu</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS was either already trained, or has been trained successfully.</li>
<li>XST_DEVICE_NOT_FOUND if no RX device is connected.</li>
<li>XST_FAILURE otherwise.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_dp_psu___config.html#a59991a74d33038e382665a3460a669ee">XDpPsu_Config::BaseAddr</a>, <a class="el" href="struct_x_dp_psu.html#a95a9619caa3d18b50a4562de54d57704">XDpPsu::Config</a>, <a class="el" href="struct_x_dp_psu.html#a1a3729a9b372f0371dea0a523cdf639d">XDpPsu::IsReady</a>, <a class="el" href="struct_x_dp_psu___link_config.html#a1e61b94ec7a7329b4b7929251b293e79">XDpPsu_LinkConfig::LaneCount</a>, <a class="el" href="struct_x_dp_psu.html#a37e28c28f46f7e08ce4738a9232a0678">XDpPsu::LinkConfig</a>, <a class="el" href="struct_x_dp_psu___link_config.html#ae1994c57d3126737fc0028f5039b62be">XDpPsu_LinkConfig::LinkRate</a>, <a class="el" href="xdppsu_8c.html#ae723bbc24a4dbce124cdd92979af27af">XDpPsu_CheckLinkStatus()</a>, <a class="el" href="xdppsu__hw_8h.html#a13298309408d465cf884b2b5eb78009b">XDPPSU_ENABLE_MAIN_STREAM</a>, <a class="el" href="xdppsu_8c.html#ad113ed848850849d07fae7ce163a8a62">XDpPsu_EnableMainLink()</a>, <a class="el" href="xdppsu__hw_8h.html#ab2400bfc1fa2146da8072bbd146f4389">XDPPSU_LANE_COUNT_SET_1</a>, <a class="el" href="xdppsu__hw_8h.html#a07e8772a5d5bc27127f948b47122cec4">XDPPSU_LANE_COUNT_SET_2</a>, <a class="el" href="xdppsu__hw_8h.html#af641cdc72bb85675494a1c463904f8e1">XDPPSU_LINK_BW_SET_162GBPS</a>, <a class="el" href="xdppsu__hw_8h.html#a826616f141ab667c2f91c83507ce2322">XDPPSU_LINK_BW_SET_270GBPS</a>, <a class="el" href="xdppsu__hw_8h.html#ab01ff3802386be5d138cf5a9af031783">XDPPSU_LINK_BW_SET_540GBPS</a>, <a class="el" href="xdppsu__hw_8h.html#a848fe33e971d0e24ed48e966024dfb9a">XDPPSU_PHY_CONFIG_PHY_RESET_MASK</a>, <a class="el" href="xdppsu__hw_8h.html#aba0f41405e22038988f7198add44b5cc">XDPPSU_PHY_CONFIG_TX_PHY_8B10BEN_MASK</a>, <a class="el" href="xdppsu__hw_8h.html#a236d6b24b5cf2e0e8ac65a4079ae93bc">XDpPsu_ReadReg</a>, <a class="el" href="xdppsu_8c.html#a6eec1f08aa677fac3467a9d34b54589c">XDpPsu_ResetPhy()</a>, and <a class="el" href="xdppsu__hw_8h.html#a8f2c84354e5bb55cd069cea5322ff051">XDPPSU_TRAINING_PATTERN_SET_OFF</a>.</p>

<p>Referenced by <a class="el" href="xdppsu__common__example_8h.html#a64d2267afa217a44aa3bf09bcd51e409">DpPsu_StartLink()</a>.</p>

</div>
</div>
<a class="anchor" id="a0a935cce246619f8f43ea0794ed9fa8e"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XDpPsu_GetRxCapabilities </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dp_psu.html">XDpPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function retrieves the RX device's capabilities from the RX device's DisplayPort Configuration Data (DPCD). </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dp_psu.html" title="The XDpPsu driver instance data. ">XDpPsu</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if the DisplayPort Configuration Data was read successfully.</li>
<li>XST_DEVICE_NOT_FOUND if no RX device is connected.</li>
<li>XST_FAILURE otherwise.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_dp_psu.html#a95a9619caa3d18b50a4562de54d57704">XDpPsu::Config</a>, <a class="el" href="struct_x_dp_psu___sink_config.html#a47d48196d88bc36406eb730f4666fceb">XDpPsu_SinkConfig::DpcdRxCapsField</a>, <a class="el" href="struct_x_dp_psu.html#a1a3729a9b372f0371dea0a523cdf639d">XDpPsu::IsReady</a>, <a class="el" href="struct_x_dp_psu.html#a37e28c28f46f7e08ce4738a9232a0678">XDpPsu::LinkConfig</a>, <a class="el" href="struct_x_dp_psu___link_config.html#a0953d4a5c490da688eb7d4636f918712">XDpPsu_LinkConfig::MaxLaneCount</a>, <a class="el" href="struct_x_dp_psu___link_config.html#a7add556a95dbf238f21ae156bfd284f3">XDpPsu_LinkConfig::MaxLinkRate</a>, <a class="el" href="struct_x_dp_psu.html#a41ce4238e52e36a29798ac88f4953d49">XDpPsu::RxConfig</a>, <a class="el" href="struct_x_dp_psu___link_config.html#a7081564e099efad7b842948efae9eed5">XDpPsu_LinkConfig::SupportDownspreadControl</a>, <a class="el" href="struct_x_dp_psu___link_config.html#a4324898c50cc247ccca7ed02e19526ba">XDpPsu_LinkConfig::SupportEnhancedFramingMode</a>, and <a class="el" href="xdppsu_8c.html#ab9d129accbf09c6474ba5e1fac854983">XDpPsu_AuxRead()</a>.</p>

<p>Referenced by <a class="el" href="xdppsu__common__example_8h.html#a64d2267afa217a44aa3bf09bcd51e409">DpPsu_StartLink()</a>.</p>

</div>
</div>
<a class="anchor" id="a17608072027dcae9a885b07ad2c25690"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XDpPsu_IicRead </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dp_psu.html">XDpPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>IicAddress</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u16&#160;</td>
          <td class="paramname"><em>Offset</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u16&#160;</td>
          <td class="paramname"><em>BytesToRead</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">void *&#160;</td>
          <td class="paramname"><em>ReadData</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function performs an I2C read over the AUX channel. </p>
<p>The read message will be divided into multiple transactions if the requested data spans multiple segments. The segment pointer is automatically incremented and the offset is calibrated as needed. E.g. For an overall offset of:</p>
<ul>
<li>128, an I2C read is done on segptr=0; offset=128.</li>
<li>256, an I2C read is done on segptr=1; offset=0.</li>
<li>384, an I2C read is done on segptr=1; offset=128.</li>
<li>512, an I2C read is done on segptr=2; offset=0.</li>
<li>etc.</li>
</ul>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dp_psu.html" title="The XDpPsu driver instance data. ">XDpPsu</a> instance. </td></tr>
    <tr><td class="paramname">IicAddress</td><td>is the address on the I2C bus of the target device. </td></tr>
    <tr><td class="paramname">Offset</td><td>is the offset at the specified address of the targeted I2C device that the read will start from. </td></tr>
    <tr><td class="paramname">BytesToRead</td><td>is the number of bytes to read. </td></tr>
    <tr><td class="paramname">ReadData</td><td>is a pointer to a buffer that will be filled with the I2C read data.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if the I2C read has successfully completed with no errors.</li>
<li>XST_ERROR_COUNT_MAX if the AUX request timed out.</li>
<li>XST_DEVICE_NOT_FOUND if no RX device is connected.</li>
<li>XST_FAILURE otherwise.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_dp_psu___config.html#a59991a74d33038e382665a3460a669ee">XDpPsu_Config::BaseAddr</a>, <a class="el" href="struct_x_dp_psu.html#a95a9619caa3d18b50a4562de54d57704">XDpPsu::Config</a>, <a class="el" href="struct_x_dp_psu.html#a1a3729a9b372f0371dea0a523cdf639d">XDpPsu::IsReady</a>, <a class="el" href="xdppsu__hw_8h.html#a5e35cfa767446df01b353e4087c129c9">XDPPSU_AUX_CMD_I2C_READ</a>, <a class="el" href="xdppsu__hw_8h.html#aca2a052c8d143f0af11b296642b25025">XDPPSU_AUX_CMD_I2C_WRITE_MOT</a>, <a class="el" href="xdppsu_8c.html#a22050229650e6ee5ac11242e5387e8e4">XDpPsu_IicWrite()</a>, <a class="el" href="xdppsu__hw_8h.html#a3c97c07d18d9c5a39382fb8f8f7518b6">XDPPSU_INTR_HPD_EVENT_MASK</a>, <a class="el" href="xdppsu__hw_8h.html#a66cf1bc6e98aa546ba11f8a8091b1f8e">XDPPSU_INTR_STATUS</a>, and <a class="el" href="xdppsu__hw_8h.html#a236d6b24b5cf2e0e8ac65a4079ae93bc">XDpPsu_ReadReg</a>.</p>

<p>Referenced by <a class="el" href="xdppsu__edid_8c.html#a1cfcf97f7f82b214ea57ba6ea2564914">XDpPsu_GetEdidBlock()</a>.</p>

</div>
</div>
<a class="anchor" id="a22050229650e6ee5ac11242e5387e8e4"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XDpPsu_IicWrite </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dp_psu.html">XDpPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>IicAddress</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>BytesToWrite</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">void *&#160;</td>
          <td class="paramname"><em>WriteData</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function performs an I2C write over the AUX channel. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dp_psu.html" title="The XDpPsu driver instance data. ">XDpPsu</a> instance. </td></tr>
    <tr><td class="paramname">IicAddress</td><td>is the address on the I2C bus of the target device. </td></tr>
    <tr><td class="paramname">BytesToWrite</td><td>is the number of bytes to write. </td></tr>
    <tr><td class="paramname">WriteData</td><td>is a pointer to a buffer which will be used as the data source for the write.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if the I2C write has successfully completed with no errors.</li>
<li>XST_DEVICE_NOT_FOUND if no RX device is connected.</li>
<li>XST_ERROR_COUNT_MAX if the AUX request timed out.</li>
<li>XST_FAILURE otherwise.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_dp_psu.html#a1a3729a9b372f0371dea0a523cdf639d">XDpPsu::IsReady</a>, and <a class="el" href="xdppsu__hw_8h.html#ad871a4a4fbd142acbd47f51a04795427">XDPPSU_AUX_CMD_I2C_WRITE</a>.</p>

<p>Referenced by <a class="el" href="xdppsu_8h.html#a17608072027dcae9a885b07ad2c25690">XDpPsu_IicRead()</a>.</p>

</div>
</div>
<a class="anchor" id="a2602de9c767cd981896326433a3c2570"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XDpPsu_InitializeTx </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dp_psu.html">XDpPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function prepares the DisplayPort TX core for use. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dp_psu.html" title="The XDpPsu driver instance data. ">XDpPsu</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if the DisplayPort TX core was successfully initialized.</li>
<li>XST_FAILURE otherwise.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_dp_psu___config.html#a59991a74d33038e382665a3460a669ee">XDpPsu_Config::BaseAddr</a>, <a class="el" href="struct_x_dp_psu.html#a95a9619caa3d18b50a4562de54d57704">XDpPsu::Config</a>, <a class="el" href="struct_x_dp_psu.html#a1a3729a9b372f0371dea0a523cdf639d">XDpPsu::IsReady</a>, <a class="el" href="struct_x_dp_psu.html#ad115a6324d57fadb9fdf33a5d1bb3133">XDpPsu::SAxiClkHz</a>, <a class="el" href="xdppsu__hw_8h.html#aadb1a6ac37fc2e571c2a0c5ba90ece94">XDPPSU_AUX_CLK_DIVIDER</a>, <a class="el" href="xdppsu__hw_8h.html#a2993f0909955fb9addd467a4796185ca">XDPPSU_AUX_CLK_DIVIDER_VAL_MASK</a>, <a class="el" href="xdppsu__hw_8h.html#a96dd8a3fe382bc8e7ae78429c44b7d52">XDPPSU_DP_DISABLE</a>, <a class="el" href="xdppsu__hw_8h.html#ab18f03371514f98187b96e9350c03816">XDPPSU_DP_ENABLE</a>, <a class="el" href="xdppsu__hw_8h.html#a18e71ddca3a5336d64bdf3a7ed75e3f9">XDPPSU_ENABLE</a>, <a class="el" href="xdppsu__hw_8h.html#a3c97c07d18d9c5a39382fb8f8f7518b6">XDPPSU_INTR_HPD_EVENT_MASK</a>, <a class="el" href="xdppsu__hw_8h.html#ad848b6db96fff173582cb637b421b1fa">XDPPSU_INTR_HPD_IRQ_MASK</a>, <a class="el" href="xdppsu__hw_8h.html#a63c73ef7b94ee2b16928d5423226e636">XDPPSU_INTR_HPD_PULSE_DETECTED_MASK</a>, <a class="el" href="xdppsu__hw_8h.html#a7961eb41e1c88de739f7462d44818b4c">XDPPSU_INTR_MASK</a>, <a class="el" href="xdppsu__hw_8h.html#a35f964035ad6eade3df5b8539989b536">XDPPSU_PHY_CLOCK_SELECT</a>, <a class="el" href="xdppsu__hw_8h.html#ac235ac35ed4fb7136ed096c754ad0c2f">XDPPSU_PHY_CLOCK_SELECT_540GBPS</a>, <a class="el" href="xdppsu__hw_8h.html#ad564b6d94b00f66d20f2469f924a0a19">XDPPSU_PHY_CONFIG</a>, <a class="el" href="xdppsu__hw_8h.html#a28a9751ea84fe5ab784defeb1f5b203b">XDPPSU_PHY_CONFIG_GT_ALL_RESET_MASK</a>, <a class="el" href="xdppsu__hw_8h.html#a236d6b24b5cf2e0e8ac65a4079ae93bc">XDpPsu_ReadReg</a>, <a class="el" href="xdppsu__hw_8h.html#a71f335fd19c1b8f3bc3eb9a3fbf4644c">XDPPSU_SOFT_RESET</a>, <a class="el" href="xdppsu__hw_8h.html#a3a7707ccbeb559d57c0def91f0f49c43">XDPPSU_SOFT_RESET_EN</a>, and <a class="el" href="xdppsu__hw_8h.html#a823328e4a95aa3ba27553603940a7ba8">XDpPsu_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="xdppsu__common__example_8h.html#ab974530daf60911aba3ef16148bd85ad">DpPsu_SetupExample()</a>.</p>

</div>
</div>
<a class="anchor" id="aee45a79c993e3bcad636dddf3121aeab"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XDpPsu_IsConnected </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dp_psu.html">XDpPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function checks if there is a connected RX device. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dp_psu.html" title="The XDpPsu driver instance data. ">XDpPsu</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>TRUE if there is a connection.</li>
<li>FALSE if there is no connection. </li>
</ul>
</dd></dl>

<p>References <a class="el" href="struct_x_dp_psu___config.html#a59991a74d33038e382665a3460a669ee">XDpPsu_Config::BaseAddr</a>, <a class="el" href="struct_x_dp_psu.html#a95a9619caa3d18b50a4562de54d57704">XDpPsu::Config</a>, <a class="el" href="xdppsu__hw_8h.html#a3f100eb641ca948e3ae71bb33b5e6512">XDPPSU_INTERRUPT_SIG_STATE</a>, <a class="el" href="xdppsu__hw_8h.html#abe45f09e082e6ceecb66597575dac0e7">XDPPSU_INTERRUPT_SIG_STATE_HPD_STATE_MASK</a>, and <a class="el" href="xdppsu__hw_8h.html#a236d6b24b5cf2e0e8ac65a4079ae93bc">XDpPsu_ReadReg</a>.</p>

<p>Referenced by <a class="el" href="xdppsu__intr_8c.html#a940393f7b33c36e51ea69d4561630222">XDpPsu_HpdInterruptHandler()</a>.</p>

</div>
</div>
<a class="anchor" id="a6eec1f08aa677fac3467a9d34b54589c"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XDpPsu_ResetPhy </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dp_psu.html">XDpPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>Reset</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function does a PHY reset. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dp_psu.html" title="The XDpPsu driver instance data. ">XDpPsu</a> instance. </td></tr>
    <tr><td class="paramname">Reset</td><td>is the type of reset to assert.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_dp_psu___config.html#a59991a74d33038e382665a3460a669ee">XDpPsu_Config::BaseAddr</a>, <a class="el" href="struct_x_dp_psu.html#a95a9619caa3d18b50a4562de54d57704">XDpPsu::Config</a>, <a class="el" href="struct_x_dp_psu.html#a1a3729a9b372f0371dea0a523cdf639d">XDpPsu::IsReady</a>, <a class="el" href="xdppsu__hw_8h.html#a18e71ddca3a5336d64bdf3a7ed75e3f9">XDPPSU_ENABLE</a>, <a class="el" href="xdppsu__hw_8h.html#ad564b6d94b00f66d20f2469f924a0a19">XDPPSU_PHY_CONFIG</a>, <a class="el" href="xdppsu__hw_8h.html#a236d6b24b5cf2e0e8ac65a4079ae93bc">XDpPsu_ReadReg</a>, and <a class="el" href="xdppsu__hw_8h.html#a823328e4a95aa3ba27553603940a7ba8">XDpPsu_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="xdppsu_8h.html#abe31bd9b101b094a40eff13ef032ea44">XDpPsu_EstablishLink()</a>.</p>

</div>
</div>
<a class="anchor" id="a7836168f290562156a24fb51762acde4"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XDpPsu_SetDownspread </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dp_psu.html">XDpPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Enable</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function enables or disables 0.5% spreading of the clock for both the DisplayPort and the RX device. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dp_psu.html" title="The XDpPsu driver instance data. ">XDpPsu</a> instance. </td></tr>
    <tr><td class="paramname">Enable</td><td>will downspread the main link signal if set to 1 and disable downspreading if set to 0.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if setting the downspread control enable was successful.</li>
<li>XST_DEVICE_NOT_FOUND if no RX device is connected.</li>
<li>XST_FAILURE otherwise.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_dp_psu___config.html#a59991a74d33038e382665a3460a669ee">XDpPsu_Config::BaseAddr</a>, <a class="el" href="struct_x_dp_psu.html#a95a9619caa3d18b50a4562de54d57704">XDpPsu::Config</a>, <a class="el" href="struct_x_dp_psu___link_config.html#aa8f2287632a67655c1b1f0e1956068af">XDpPsu_LinkConfig::DownspreadControl</a>, <a class="el" href="struct_x_dp_psu.html#a1a3729a9b372f0371dea0a523cdf639d">XDpPsu::IsReady</a>, <a class="el" href="struct_x_dp_psu.html#a37e28c28f46f7e08ce4738a9232a0678">XDpPsu::LinkConfig</a>, <a class="el" href="xdppsu_8c.html#ab9d129accbf09c6474ba5e1fac854983">XDpPsu_AuxRead()</a>, <a class="el" href="xdppsu_8c.html#a619df5cbd94b7f0459e62b55a34e5df5">XDpPsu_AuxWrite()</a>, <a class="el" href="xdppsu__hw_8h.html#ad4beaa963b7a63da99c8663caa7c7440">XDPPSU_DOWNSPREAD_CTRL</a>, and <a class="el" href="xdppsu__hw_8h.html#a823328e4a95aa3ba27553603940a7ba8">XDpPsu_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="xdppsu__common__example_8h.html#a64d2267afa217a44aa3bf09bcd51e409">DpPsu_StartLink()</a>.</p>

</div>
</div>
<a class="anchor" id="a2ec5ae4af1f5232fc86116d457045997"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XDpPsu_SetEnhancedFrameMode </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dp_psu.html">XDpPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Enable</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function enables or disables the enhanced framing symbol sequence for both the DisplayPort TX core and the RX device. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dp_psu.html" title="The XDpPsu driver instance data. ">XDpPsu</a> instance. </td></tr>
    <tr><td class="paramname">Enable</td><td>will enable enhanced frame mode if set to 1 and disable it if set to 0.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if setting the enhanced frame mode enable was successful.</li>
<li>XST_DEVICE_NOT_FOUND if no RX is connected.</li>
<li>XST_FAILURE otherwise.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_dp_psu___config.html#a59991a74d33038e382665a3460a669ee">XDpPsu_Config::BaseAddr</a>, <a class="el" href="struct_x_dp_psu.html#a95a9619caa3d18b50a4562de54d57704">XDpPsu::Config</a>, <a class="el" href="struct_x_dp_psu___link_config.html#aab19db4a5af65cabf219702e29716368">XDpPsu_LinkConfig::EnhancedFramingMode</a>, <a class="el" href="struct_x_dp_psu.html#a1a3729a9b372f0371dea0a523cdf639d">XDpPsu::IsReady</a>, <a class="el" href="struct_x_dp_psu.html#a37e28c28f46f7e08ce4738a9232a0678">XDpPsu::LinkConfig</a>, <a class="el" href="xdppsu_8c.html#ab9d129accbf09c6474ba5e1fac854983">XDpPsu_AuxRead()</a>, <a class="el" href="xdppsu_8c.html#a619df5cbd94b7f0459e62b55a34e5df5">XDpPsu_AuxWrite()</a>, <a class="el" href="xdppsu__hw_8h.html#acb217703567249190f6250fba75a0a38">XDPPSU_ENHANCED_FRAME_EN</a>, and <a class="el" href="xdppsu__hw_8h.html#a823328e4a95aa3ba27553603940a7ba8">XDpPsu_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="xdppsu__common__example_8h.html#a64d2267afa217a44aa3bf09bcd51e409">DpPsu_StartLink()</a>.</p>

</div>
</div>
<a class="anchor" id="a868ca9bd2184707f3929e6f7e695cc93"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XDpPsu_SetLaneCount </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dp_psu.html">XDpPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>LaneCount</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function sets the number of lanes to be used by the main link for both the DisplayPort TX core and the RX device. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dp_psu.html" title="The XDpPsu driver instance data. ">XDpPsu</a> instance. </td></tr>
    <tr><td class="paramname">LaneCount</td><td>is the number of lanes to be used over the main link.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if setting the new lane count was successful.</li>
<li>XST_DEVICE_NOT_FOUND if no RX is connected.</li>
<li>XST_FAILURE otherwise.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_dp_psu___config.html#a59991a74d33038e382665a3460a669ee">XDpPsu_Config::BaseAddr</a>, <a class="el" href="struct_x_dp_psu.html#a95a9619caa3d18b50a4562de54d57704">XDpPsu::Config</a>, <a class="el" href="struct_x_dp_psu.html#a1a3729a9b372f0371dea0a523cdf639d">XDpPsu::IsReady</a>, <a class="el" href="struct_x_dp_psu___link_config.html#a1e61b94ec7a7329b4b7929251b293e79">XDpPsu_LinkConfig::LaneCount</a>, <a class="el" href="struct_x_dp_psu.html#a37e28c28f46f7e08ce4738a9232a0678">XDpPsu::LinkConfig</a>, <a class="el" href="xdppsu_8c.html#ab9d129accbf09c6474ba5e1fac854983">XDpPsu_AuxRead()</a>, <a class="el" href="xdppsu_8c.html#a619df5cbd94b7f0459e62b55a34e5df5">XDpPsu_AuxWrite()</a>, <a class="el" href="xdppsu__hw_8h.html#a25090ba43a6682938a143310ed73d844">XDPPSU_LANE_COUNT_SET</a>, and <a class="el" href="xdppsu__hw_8h.html#a823328e4a95aa3ba27553603940a7ba8">XDpPsu_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="xdppsu__common__example_8h.html#a64d2267afa217a44aa3bf09bcd51e409">DpPsu_StartLink()</a>, and <a class="el" href="xdppsu_8h.html#a3d4cefedd9d272f58c7927b72add609d">XDpPsu_CfgMainLinkMax()</a>.</p>

</div>
</div>
<a class="anchor" id="a68384c6a808dff1f2e68e7611057a548"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XDpPsu_SetLinkRate </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dp_psu.html">XDpPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>LinkRate</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function sets the data rate to be used by the main link for both the DisplayPort TX core and the RX device. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dp_psu.html" title="The XDpPsu driver instance data. ">XDpPsu</a> instance. </td></tr>
    <tr><td class="paramname">LinkRate</td><td>is the link rate to be used over the main link based on one of the following selects:<ul>
<li>XDPPSU_LINK_BW_SET_162GBPS = 0x06 (for a 1.62 Gbps data rate)</li>
<li>XDPPSU_LINK_BW_SET_270GBPS = 0x0A (for a 2.70 Gbps data rate)</li>
<li>XDPPSU_LINK_BW_SET_540GBPS = 0x14 (for a 5.40 Gbps data rate)</li>
</ul>
</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if setting the new link rate was successful.</li>
<li>XST_DEVICE_NOT_FOUND if no RX device is connected.</li>
<li>XST_FAILURE otherwise.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_dp_psu___config.html#a59991a74d33038e382665a3460a669ee">XDpPsu_Config::BaseAddr</a>, <a class="el" href="struct_x_dp_psu.html#a95a9619caa3d18b50a4562de54d57704">XDpPsu::Config</a>, <a class="el" href="struct_x_dp_psu.html#a1a3729a9b372f0371dea0a523cdf639d">XDpPsu::IsReady</a>, <a class="el" href="struct_x_dp_psu.html#a37e28c28f46f7e08ce4738a9232a0678">XDpPsu::LinkConfig</a>, <a class="el" href="struct_x_dp_psu___link_config.html#ae1994c57d3126737fc0028f5039b62be">XDpPsu_LinkConfig::LinkRate</a>, <a class="el" href="xdppsu_8c.html#a619df5cbd94b7f0459e62b55a34e5df5">XDpPsu_AuxWrite()</a>, <a class="el" href="xdppsu__hw_8h.html#a39533d8f8e18fce7b13f84d440b6b176">XDPPSU_LINK_BW_SET</a>, <a class="el" href="xdppsu__hw_8h.html#af641cdc72bb85675494a1c463904f8e1">XDPPSU_LINK_BW_SET_162GBPS</a>, <a class="el" href="xdppsu__hw_8h.html#a826616f141ab667c2f91c83507ce2322">XDPPSU_LINK_BW_SET_270GBPS</a>, <a class="el" href="xdppsu__hw_8h.html#ab01ff3802386be5d138cf5a9af031783">XDPPSU_LINK_BW_SET_540GBPS</a>, <a class="el" href="xdppsu__hw_8h.html#a89ac9477adf2f20000d1b6f9d4adb617">XDPPSU_PHY_CLOCK_SELECT_162GBPS</a>, <a class="el" href="xdppsu__hw_8h.html#ad41a2cbf2a3730426b20ab8b1cd7f257">XDPPSU_PHY_CLOCK_SELECT_270GBPS</a>, <a class="el" href="xdppsu__hw_8h.html#ac235ac35ed4fb7136ed096c754ad0c2f">XDPPSU_PHY_CLOCK_SELECT_540GBPS</a>, and <a class="el" href="xdppsu__hw_8h.html#a823328e4a95aa3ba27553603940a7ba8">XDpPsu_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="xdppsu__common__example_8h.html#a64d2267afa217a44aa3bf09bcd51e409">DpPsu_StartLink()</a>, and <a class="el" href="xdppsu_8h.html#a3d4cefedd9d272f58c7927b72add609d">XDpPsu_CfgMainLinkMax()</a>.</p>

</div>
</div>
<a class="anchor" id="a690be0eee00d0c06370f88fdfbfdfb75"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XDpPsu_SetScrambler </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dp_psu.html">XDpPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Enable</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function enables or disables scrambling of symbols for both the DisplayPort and the RX device. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dp_psu.html" title="The XDpPsu driver instance data. ">XDpPsu</a> instance. </td></tr>
    <tr><td class="paramname">Enable</td><td>will enable or disable scrambling.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if setting the scrambling enable was successful.</li>
<li>XST_FAILURE otherwise.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_dp_psu___config.html#a59991a74d33038e382665a3460a669ee">XDpPsu_Config::BaseAddr</a>, <a class="el" href="struct_x_dp_psu.html#a95a9619caa3d18b50a4562de54d57704">XDpPsu::Config</a>, <a class="el" href="struct_x_dp_psu.html#a1a3729a9b372f0371dea0a523cdf639d">XDpPsu::IsReady</a>, <a class="el" href="struct_x_dp_psu.html#a37e28c28f46f7e08ce4738a9232a0678">XDpPsu::LinkConfig</a>, <a class="el" href="struct_x_dp_psu___link_config.html#acdbacf632dd479df825fa795e6647250">XDpPsu_LinkConfig::ScramblerEn</a>, <a class="el" href="xdppsu_8c.html#ab9d129accbf09c6474ba5e1fac854983">XDpPsu_AuxRead()</a>, <a class="el" href="xdppsu_8c.html#a619df5cbd94b7f0459e62b55a34e5df5">XDpPsu_AuxWrite()</a>, <a class="el" href="xdppsu__hw_8h.html#a6025e9ebba67eb43d4e7894386b0806e">XDPPSU_SCRAMBLING_DISABLE</a>, and <a class="el" href="xdppsu__hw_8h.html#a823328e4a95aa3ba27553603940a7ba8">XDpPsu_WriteReg</a>.</p>

</div>
</div>
</div><!-- contents -->
</div><!-- doc-content -->
<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
	<p class="footer">&copy; Copyright 2015-2022 Xilinx, Inc. All Rights Reserved.</p>
	<p class="footer">&copy; Copyright 2022-2023 Advanced Micro Devices, Inc. All Rights Reserved.</p>
</div>
</body>
</html>
